1. Field of the Invention
The present invention relates to a method for producing a crystalline silicon film that is formed on an insulating substrate such as a glass substrate, or a semiconductor substrate such as a single crystal silicon substrate, on which an insulating film is formed. In particular, the present invention relates to a method for obtaining a crystalline silicon film having a favorable crystalline state, comprising crystallizing an amorphous silicon film by means of annealing, in which lateral growth is allowed to occur on the amorphous silicon film by using a catalyst element (e.g., nickel) which accelerates the crystallization. Also, the invention relates to a method for manufacturing a semiconductor using such a crystalline silicon film.
2. Description of the Related Art
A crystalline silicon film that is formed on an insulating surface is indispensable for a semiconductor device such as a thin film transistor.
In general, a crystalline silicon film is obtained by crystallizing an amorphous silicon film by means of heating the amorphous silicon film or by irradiating laser light.
However, considering the electric properties, the crystalline silicon film obtained by heating or by irradiating a laser light is far inferior to a single crystal silicon wafer. Moreover, at present, a thin film transistor (referred to as a "TFT") implemented by using such crystalline silicon films is also far inferior to a MOS-type transistor using a single crystal silicon wafer.
This is ascribed to the fact that the crystalline silicon film thus obtained contains defects at high density.
At present, the operation speed of a TFT consisting of a crystalline silicon film using an amorphous silicon film as the starting film is about several MHz or lower at best.
In contrast to above, an integrated circuit using a single crystal wafer having an operation speed of about 200 MHz is already put into practical use.
In case a technology generally known as SOI technology is employed, a MOS-type transistor having an operation speed exceeding the case of using a single crystal wafer is obtained because the capacitance is effectively reduced.
This technology comprises forming a single crystal layer on the silicon oxide layer by utilizing a single crystal silicon wafer. However, this technology is not practically feasible because of its disadvantages such that the size of the single crystal wafer is limited, and that it requires a complicated and costly manufacturing process.
According to the study of the present inventors, it is known that, by using particular kinds of metal elements which accelerate the crystallization of silicon, an amorphous silicon film can be modified into a high quality crystalline silicon film at a lower temperature and in a shorter duration of time.
The metal elements which accelerate the crystallization of silicon include nickel (Ni), platinum (Pt), palladium (Pd), copper (Cu), silver (Ag), and iron (Fe).
In particular, the direction of crystal growth can be controlled by non-selectively introducing such metal elements, and thus, silicon films having the preferred crystal structure suitable for devices can be obtained.
By employing such a technology, a TFT having characteristics well comparable to those of a MOS-type transistor using a single crystal silicon wafer can be realized (see Japanese Patent Application No.8-335152 filed by the present inventors on Nov. 29, 1996).
This technology is denoted as "lateral growth method". In a silicon film obtained by the lateral growth method, crystal grain boundaries are formed in parallel with the direction of growth; hence, by controlling the direction of electric current to be in parallel with the direction of crystal growth, the effect of the crystal grain boundaries can be reduced extremely. As a result, a polycrystalline material having characteristics well equivalent to those of a single crystal material can be realized.
The lateral growth method is described briefly below. The method comprises forming a mask film made of silicon oxide and the like on an amorphous silicon film, and forming selectively a window therein. A metal element, representatively nickel, which accelerates the crystallization of silicon, is introduced into the amorphous silicon film through this window. In FIG. 1A, a window is denoted by reference numeral 11.
As a method for introducing the metal element, there can be mentioned a method comprising depositing on a predetermined region of the amorphous silicon film, a film of a compound containing the metal element by means of sputtering (see Japanese Unexamined Patent Publication No.7-45519 or 7-66425), a vapor growth method (Japanese Unexamined Patent Publication No. 7-335548), or a coating method (Japanese Unexamined Patent Publication No.7-130652).
Then, by performing annealing for crystallization, the region of crystalline silicon (lateral growth region) 13 is expanded around the window. Such a region can be obtained because the catalyst element crystallizes the amorphous silicon film while it diffuses inside the silicon film. In general, crystallization proceeds farther for higher temperature and longer duration (see FIG. 1A; details are described in the unexamined patent publications mentioned above). This crystal growth is called lateral growth because it proceeds in the direction parallel with the film plane.
The properties of the semiconductor device can be improved by arranging the direction of lateral growth to match with the direction of current flow in semiconductor devices such as a thin film transistor (TFT). Specifically, TFTs can be arranged in a variety of ways. An example of such ways is shown in FIG. 3. Referring to FIG. 3, there is shown a crystallized region 302 obtained by lateral growth around a window portion 301 into which the catalyst element is added.
In such a case, an oval laterally grown region as shown in FIG. 3 can be obtained if a rectangular window 301 is provided. In this case, the gate electrode 304 is arranged approximately in parallel with the region 301 as is shown by TFT1, so that crystal growth may occur in a direction from drain 305 to source 303, or in the reversed direction.
Furthermore, as is shown in TFT2 of FIG. 3, there are cases in which the region 301 is arranged approximately vertical to the gate electrode 307, so that the crystal growth may occur approximately simultaneously with source 306 and drain 308. Thus, concerning the characteristics of the resulting TFT, high ON current is obtained when the former method is adopted because the crystal grain boundaries are arranged in a direction parallel to the direction of current flow. In contrast to this, a TFT with high OFF current results when the latter method is adopted, because the crystal grain boundaries are arranged in a direction vertical to the direction of current flow.
Otherwise, the window may be narrowed into a line so that the catalyst element is added linearly. FIGS. 4A and 4B show a case of a circuit provided with a plurality of TFTs, in which the regions 401 and 406 of catalyst element addition are formed in parallel with the gate lines 402 and 407. FIG. 4A corresponds to TFT2 shown in FIG. 3, which is the case of adding catalyst elements approximately vertical to the gate electrodes of the TFTs 403 to 405. FIG. 4B corresponds to TFT1 shown in FIG. 3, which is the case of adding catalyst elements approximately vertical to the gate electrodes of the TFTs 408 to 410.
Controlling the direction of crystal growth by using the lateral growth process is effective in sophisticated semiconductor integrated circuits in which devices having functions conflicting to each other are formed on a single substrate. FIG. 5 shows a block diagram of a monolithic active matrix circuit for use in liquid crystal displays. Referring to FIG. 5, a source driver (column driver) 501 and gate driver (row driver) 502 are provided as peripheral driver circuits. In the figure are also shown a video signal 503, a latch pulse 504, a shift register X 505, an analog memory 506, an analog switch 507, an analog buffer 508, and a shift register Y 509.
A large number of pixel circuits comprising transistors 511 and capacitors 512 for switching are formed in the active matrix circuit (pixel) region 510; the pixel transistors 511 of the active matrix circuit are connected with the peripheral driver circuit by the source lines and the gate lines corresponding to the number of rows and columns, respectively. In FIG. 5, a liquid crystal portion 513 is also shown. High speed operation is required for the TFTs that are used in the peripheral circuit, and particularly, for the peripheral logic circuits such as a shift register. To fulfill this requirement, it is required that the current when selected (ON current) is high, and that the scattering is small.
In contrast to above, TFTs for use in pixel circuits are required in which the charge accumulated in the capacitor can be retained for a longer duration of time. Accordingly, they should have a sufficiently low leak current (i.e., OFF current) when it is not selected, that is, the leak current is sufficiently low when reversed bias voltage is applied to the gate electrode, and in which the fluctuation thereof is small. More specifically, an OFF current of 1 pA or lower with a fluctuation within one digit is required. To the contrary, the ON current need not be so high.
As described above, TFTs having physical properties thus conflicting with each other, i.e., a high ON current and low leak current, yet, with small fluctuation in the value, are required to be formed on a single substrate. However, it can be readily understood that it is extremely difficult to technologically fulfill these requirements by an ordinary method of crystallization.
The problems above can be solved by controlling the direction of crystallization by employing lateral growth method (see Japanese Unexamined Patent Publication No.8-213634). It is well known that lateral growth method using catalyst elements is effective.
Furthermore, the fluctuation in characteristics of devices can be minimized.
Moreover, TFTs manufactured by using the thus laterally grown region can be operated at a speed as high as several hundreds of megahertz (MHz) (see Japanese patent application No. 8-335152 filed by the present inventors on Nov. 29, 1996).
Still, problems were found on the control in distance of lateral growth and on the reliability of the resulting device characteristics.
To solve the problems above, intensive study has been carried out, and the following points have been found.
(1) It is sometimes found to generate a region comprising concentrated defects on the way of lateral growth, or a region in which lateral growth is apparently impaired.
(2) The TFTs manufactured by using the portions of such a state exhibit inferior device characteristics and low reliability.
Ideally, an infinitely large laterally growth can be obtained by performing annealing at a higher temperature and for a longer duration of time. In fact, however, although the laterally grown region expands, a plurality of portions of catalyst element precipitation are formed inside the expanded region. The catalyst elements are electrically conductive, and when they are etched, vacancies remain on the silicon film to cause defective circuits.
Thus, when an attempt is made to obtain a large laterally grown region, the quality of the crystal as a whole decreases due to the precipitation of the catalyst element. This is illustrated in FIG. 1B. FIG. 1B shows the state in which lateral growth continues from the state shown in FIG. 1A, and the region 13 of lateral growth expands to the portion shown by the oval 14 drawn by a solid line (In FIG. 1A, the portion is shown by an oval 12 drawn by broken lines).
However, particularly in the portion far from the window, a region in which catalyst element is precipitated (indicated by black dots 15 in FIG. 1B) appears.
In general, the window 11 and the region in vicinity thereof are high in catalyst element concentration, and are therefore preferred that the main portion of the device is manufactured without using these regions. Under the present technology level, in a lateral growth method using nickel as a catalyst element, the width of the lateral growth free from precipitation of nickel is from 50 to 60 .mu.m at maximum, but it is necessary to increase the lateral growth region in larger devices.
As a result of intensive study on this point, the precipitation of catalyst element has been found to occur due to the discontinuation of lateral growth attributed to spontaneous crystallization (generation of crystal nuclei and crystal growth which occurs without the function of catalyst element). In other words, it has been found that it occurred influenced by the spontaneous crystallization other than the crystallization using the function of the additional metal element.
In further detail, lateral growth using the function of a metal element was found to be greatly obstructed or halted when it reached the crystal growth region which proceeds spontaneously.
This has been found to be the cause of concentrating defects to a part of the lateral growth region or of realizing a state in which the lateral growth is obstructed, and also, a cause of fluctuation in the characteristics or instability in a TFT obtained.